RATE-DISTORTION-COMPLEXITY OPTIMIZATION FOR VLSI IMPLEMENTATION OF INTEGER M0TION ESTIMATION IN H.264/AVC ENCODER
Alireza Aminlou, Zahra Najafihaghi, Majid Namaki, M. R. HashemiAbstract
In order to accommodate the wide range of applications and the corresponding platforms where the H.264/AVC standard is currently in place, one should be able to optimize the encoder’s computational complexity with a careful selection of the coding configuration parameters. Motion estimation is the most time-consuming part of the encoder which constitutes up to 75% of the computational complexity. In this paper, the optimum selection of configuration parameters, including search range, reference frame, degree of down-sampling and number of truncation bits have been analyzed for the VLSI implementation of integer motion estimation in terms of distortion-complexity performance. Furthermore, the optimum parameter sets have been presented for different video sizes and different constraints on computational power.
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